It was a well-choreographed Vaudeville routine, a thing of precision and wonder, dancing into itself like egg beaters. Every instruction timed with care and precision, every clock cycle accounted for, unstoppable, untouchable, pure clean hand-optimized asm. But that was before it went from being a 1-channel device to an 8-channel device. That’s when I discovered what all those extra pins were for. The ones for the expansion card that had been pinned out but never designed, until now. The ones that are shared with CompactFlash address lines, because there weren’t enough to go around. In the back of my mind, I knew this day was coming, and shouldn’t have let the extra nastiness involved take me by surprise like that… (how do you talk to a chip you don’t have yet?) I just didn’t anticipate the size of the monkey wrench it would throw into my works. Whee, interrupting the interrupt in the middle of the disk write it’s almost guaranteed to have interrupted, flipping the address lines a.k.a. expansion lines while the card’s in this little suspended animation and hoping it won’t notice. (And that a zillion other manufacturers’ cards won’t notice, either.) And all the time-consuming gyrations to ensure that no other lines controlled by the same register change at any time during this, and that all the original state gets restored at the end.
Woo, a lot of (re-)testing to make certain that CompactFlash doesn’t mind me arbitrarily throwing glitches on its address lines in the middle of a write.
Curse you, Ke*, for introducing the term ‘regression testing‘ into my vocabulary :-) (I think I have to go and wash my mouth out with battery acid now… and bathe my typing fingers in dihydrogen monoxide.)
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